Cayetano Santos<p>Uses verification <a href="https://sigmoid.social/tags/osvvm" class="mention hashtag" rel="tag">#<span>osvvm</span></a> library and <a href="https://sigmoid.social/tags/openlogic" class="mention hashtag" rel="tag">#<span>openlogic</span></a> standard <a href="https://sigmoid.social/tags/vhdl" class="mention hashtag" rel="tag">#<span>vhdl</span></a>, along with <a href="https://sigmoid.social/tags/ghdl" class="mention hashtag" rel="tag">#<span>ghdl</span></a> for simulation, <a href="https://sigmoid.social/tags/hdlmake" class="mention hashtag" rel="tag">#<span>hdlmake</span></a> for project creation and <a href="https://sigmoid.social/tags/yosys" class="mention hashtag" rel="tag">#<span>yosys</span></a> for synthesis.</p><p>All dependencies are manipulated with a declarative manifest file.</p><p><a href="https://git.sr.ht/~csantosb/ip.alu/tree/test/item/.builds/manifest.scm" target="_blank" rel="nofollow noopener" translate="no"><span class="invisible">https://</span><span class="ellipsis">git.sr.ht/~csantosb/ip.alu/tre</span><span class="invisible">e/test/item/.builds/manifest.scm</span></a></p>