I love to hear about interesting accounts to follow for #FPGA, #riscv, #oshw, and #permacomputing.
I love to hear about interesting accounts to follow for #FPGA, #riscv, #oshw, and #permacomputing.
A new stepping of the RP2350 ARM/RISC-V microcontroller fixes a number of bugs and officially supports 5V-tolerant GPIOs (however, the chip must remain powered while 5V IOs are used).
Картинки не мої і взяті тут:
https://www.moonbench.xyz/projects/1-bit-oled-art-gallery/
Потрібно ще попрацювати з сувом пікселів, але мені результат уже подобається
Tomorrow on the open source silicon stream, I'll be looking at what's involved to submit to the #TinyTapeout #RISCV competition.
Stream starts at 8:00 PT / 17:00 CEST / 21:30 IST
Looks like the designers of this #AI accelerator have kept the cost down by using a #riscv architecture in some parts.
https://community.axelera.ai/product-updates/the-metis-ai-platform-a-technical-deepdive-125
Statt Intel nun die 30Mrd Subventionen zu geben, kann man nun in die eigene Chip Entwicklung von RiscV investieren. Ganz nach dem EU Chip Act!
*preparing for RISCV vector, IME and AME meetings*
"Just another Matrix Mondayyyyyyy"
"I wish it were tensor Tuesdayyyyyyyy"
Discover the Orange Pi R2S, a powerful single-board computer running Linux with a RISC-V processor and four wired network ports. Boost your skills with OS-SCi's expert education. #OrangePi #Linux #RISCV #Tech https://www.linuxlinks.com/orangepi-r2s-single-board-computer-running-linux-introduction/
A history of MIPS, the processor architecture and the chip making company.
In a surprise move, NVIDIA is bringing CUDA to RISC-V CPUs
Announced at RISC-V Summit China , this allows RISC-V processors to run CUDA drivers + logic, with NVIDIA GPUs handling compute tasks
Enables open CPU + proprietary GPU AI systems—big for edge, HPC & China’s chipmakers
A potential shift in global AI infrastructure
#Debian13.0 Ready To Introduce Formal #RISCV Support But Still Bound By Slow Hardware
#Debian's RISC-V ambitions date back a decade when thfirst #RISCV64 port was started for Debian and then after all the work over the years, Debian 13.0 in August will finally debut it as an official architecture. #RV64GC is the current target for Debian RISC-V and using UEFI-based booting as the default. Over seventeen thousand source Debian packages are building for RISC-V with Trixie.
https://www.phoronix.com/news/Debian-13-RISC-V-Ready
OrangePi RV2: The New Reference SBC for RISC-V Enthusiasts: https://boilingsteam.com/orange-pi-rv2-new-risc-v-board-review/
#linux #update #release #hardware #review #riscv #orangepi #sbc #alternative
「 With the Debian 13.0 release planned for 9 August, one of the notable fundamental features with this Debian "Trixie" release is now supporting RISC-V as an official CPU architecture 」
Building Olimex's EUR 1.00 RISC-V Retro Like PC and exploring RISC-V instruction set with WozMon by Benard Mesander https://needlesscomplexity.substack.com/p/building-the-olimex-rvpc-retrocomputer7 #riscv #retrocomputing #assembler
By Anton Shilov for @TomsHardware - #NVIDIA #CUDA now supports #RISCV - is this a signal of broader ecosystem support?
The RISC-V community is very active in Fedora. Initial support for RISC-V in @centos was started from Fedora and they just want to keep on trucking!
If you want to learn more about how our open OS is meeting their open architecture, check out their Matrix room!
Learn more: https://blog.centos.org/2025/05/initial-centos-support-for-risc-v/